Evidence receipt / prediction
Published · transcript-backedGeorge Hotz: prediction
20 Jun 2023 Latent Space Commoditizing the Petaflop — with George Hotz of the tiny corp
“They're excited about reduced instruction set processors. So TinyGrad is, we are going to make a RISC offset for all ML models.”
Source trail
Everything needed to verify it.
- Speaker
- George Hotz
- Attribution
- Verified speaker
- Claim type
- prediction
- Recorded
- 20 Jun 2023
- Publisher
- Latent Space
Transcript context
…Can you share three core pieces to TinyCorp? Maybe we can dive into each of them. So XLA, PrimTorch, those are the complex instruction system. TinyGrad is the restricted instruction system. So you're kind of focused on, again, TinyGrad being small, not being overcomplicated and trying to get as close to the DSP as possible in a way where it's at more. Well, it's a very clear analogy from how processes are developed. So a lot of processes back in the day were CISC, complex instruction set, system 360, and then x86. This isn't how things stayed. They went to now the most common processor is ARM, and people are excited about RISC-V. No one's excited about it. RISC-V is even less complex than ARM. No one is excited about CISC processors anymore. They're excited about reduced instruction set processors. So TinyGrad is, we are going to make a RISC offset for all ML models. And yeah, it can run all ML models with basically 25 instead of the 250 of XLA or PrimeTorch. So about 10x less complex. Yep.…
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